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Integrated Ultra-fast Close Control in CMOS Technology for High-speed Semiconductor Power Transistors

par Laurence Laffont - publié le , mis à jour le

Plinio BAU’s thesis defense, intitled « Commande rapprochée ultra-rapide intégrée en technologie CMOS pour les transistors de puissance à semi-conducteurs grand-gap » (Integrated Ultra-fast Close Control in CMOS Technology for High-speed Semiconductor Power Transistors) will be taking place on Thursday, December 3rd 2020, at 10am, through visioconferencing.

The work for this thesis has been issued from a collaboration between LAPLACE and the IRT Saint Exupéry.

Zoom link :
https://inp-toulouse-fr.zoom.us/j/95781776395?pwd=NE9uQnh4b2NNeUEwelVqRnAwdDJEdz09

Reunion ID : 957 8177 6395
Code : 340031
Mind switching off your microphone and camera

Jury :

Mr Bruno ALLARD - École Centrale de Lyon - Ampère Laboratory -Rapporteur
Mr Nadir IDIR - University of Lille L2EP - Rapporteur
Mr Francois COSTA - University of Paris Est Créteil - SATIE Laboratory - Reviewer
Mrs Radoslava MITOVA - Schneider Electric - Reviewer
Mr Frédéric RICHARDEAU - Toulouse’s Institut National Polytechnique - LAPLACE - Reviewer
Mr Nicolas ROUGER - Toulouse’s Institut National Polytechnique - LAPLACE - Thesis Supervisor
Mr Marc COUSINEAU - Institut National Polytechnique de Toulouse - LAPLACE - Thesis co-Supervisor
Mr Bernardo COUGO - Institut National Polytechnique de Toulouse - LAPLACE - Industrial co-Supervisor
Mr Olivier CREPEL - Airbus Central R&T - Guest

Abstract :
In this thesis, an active gate control technique is presented to control the switching speed of large-gap semiconductor power transistors (SiC and GaN technologies).
An innovative close control circuit slows down the switching speed when the power transistor is turned on, thus reducing EMC disturbances without having too great of an impact upon switching losses.
The proposed method is implemented within two integrated circuits in CMOS technology which allows obtaining reaction times for a feedback loop lower than the nanosecond. With such performances, it is experimentally shown that it is possible to control switching speeds higher than 100 V/ns at 400 V voltages.

Keywords :
Close control, switching speed, large gap components, dv/dt, looped system, EMC (electromagnetic compatibility).