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Failure Mechanisms Implementation into SiGe HBT Compact Model Operating Close to Safe-operating-area Edges

par Laurence Laffont - publié le , mis à jour le

Marine COURET’s thesis defense intitled “Intégration des mécanismes de défaillance dans le modèle compact des TBH SiGe évoluant au plus proche de l’aire de sécurité de fonctionnement” (Failure Mechanisms Implementation into SiGe HBT Compact Model Operating Close to Safe-operating-area Edges) on Tuesday, Deember 15th, 2020 at 2 pm in the amphithéâtre Jean-Paul DOM at the laboratory IMS (University of Bordeaux).

According to the current sanitary measures, the thesis defense will be broadcasted on the BEE Branch YouTube channel.
Link here :

Jury :

Mr Frédéric ANIEL - University of Paris-Sud professor - Rapporteur
Mr Fabien PASCAL - University of Montpellier professor - Rapporteur
Mr Jean-Baptiste BEGUERET - University of Bordeaux professor - Reviewer
Mr Didier CÉLI - IST Microelectronics ingeneer - Reviewer
Ms Nathalie DELTIMPLE - Institut National Polytechnique of Bordeaux professor- Reviewer
Mr Gerhard FISCHER - IHP Microelectronics ingeneer - Reviewer
Mr François MARC - University of Bordeaux professor - Reviewer
Mr Chhandak MUKHERJEE - CNRS research officer - Guest
Ms Cristell MANEUX - University of Bordeaux professor - Thesis Supervisor

Abstract :

In an evergrowing terahertz market, BiCMOS technologies have reached cut-off frequencies beyond 0.5 THz. These dynamic performances are achieved thanks to the present-day technological improvements in SiGe heterojunction bipolar transistors (HBTs).
Howerver, these increased performances lead to a transistors-bias-points shift closer to, or even beyond, the conventional safe operating area (SOA). As a consequence, several parasitic physical effects are encountered such as impact-ionization or self-heating which may potentially activate failure mechanisms, henceforth limiting the long-term reliability of the electronic device.
In the framework of this thesis, is developped an approach for the depiction as well as the modelization of hot-carrier-degradation occurring in SiGe HBTs when operating near the SOA’s edges. The study aims to provide an in-depth characterization of transistors operating under static and dynamic operating conditions.
Based on these measurement results, a compact model for the impact-ionization and the self-heating has been proposed, ultimately allowing the extention of the validity domain of of a commercially available compact-model (HiCuM). Considering the operation as close as possible to the SOA, an ageing campaign was conducted in order to figure out the physical origin behind such failure mechanisms. As a result, it has been demonstrated that hot-carrier degradation leads to the creation of trap densities at the Si/SiO₂ interface of the emitter-based spacer which adds a new recombination power to the base.
A compact-model integrating ageing laws (HiCuM-AL) was developed for the prediction of the transistors / electrical circuit paramaters’ evolution through an accelerated-ageing factor. For ease of use in computer-aided design (CAD) tools, the ageing laws have been scaled according to the geometry nad architecture of the emitter-based spacer. Robustness of the model has been demonstrated as well as its accuracy for different SiGe HBT technologies under various ageing conditions.
In addition, a study on the reliability of several integrated circuits has been performed, leading to a precise location of the regions most sensitive to the hot-carrier-degradation mechanism. Thus, the HiCuM-AL model is paving the way to perform circuit-simulations optimizing the mm-wave circuit design, not only in terms of sheer performances, but also of long-term reliability.

Keywords :
SiGe HBT - Reliability - Compact Model - Hot-carriers